Created By: Hussein Nosair

Solution

PADS 9.0 and newer:
Beginning with PADS 9.0 there is native IPC netlist extract capability.  Go to File > Export and change the "Files of Type" from ASCII Files (*.asc) to IPC 356 Files (*.ipc).  After clicking save you will be able to choose between IPC-D-356 or IPC-D-356A netlist output.
PADS2007.4 and older:

The older versions of PADS do not have native IPC netlist extraction.  However, you can download a VB script that has been written by a 3rd party vendor at CapeCAD.com (note, the VB script has not been tested by Mentor Graphics and we assume no responsibility for it’s accuracy).

Created By: Hussein Nosair 

Solution

Method1:1) Open your schematic in PADS Logic
2) Go tools > select PADS Layout > You will get ‘Connect to PADS Layout’ popup menu > click on Open > Navigate to modified PCB Design file > click Open.
3) The selected PCB design file will open in another PADS Layout window (keep it open).
4) Select PADS Logic window
5) Within the ‘PADS Layout link’ popup menu > click on the Design tab > click on ‘ECO from PCB’

This will update the changes of PADS Layout into PADS Logic

Method2:1) Open your PCB design file in PADS Layout
2) Go tools > Compare/ECO > you will get Compare/ECO Tools popup window
3) Click on the Documents tab > Add a check mark next to "Original Design to Compare and Update" and navigate schematic netlist file.
4) Then from "New Design with Changes" , click "Use Current PCB Design".
5) From the ‘Output Options’ add a check mark next to "Generate Difference Report" and "Generate ECO File"
6) Note down the location of ECO file then is going to be generated and click on the button ‘RUN’
7) Open PADS Logic
Invoke Schematic file.
9) Go to File > Import > will get ‘File Import’ popup menu
10) Within the popup menu select ‘Files of Type’ as ECO Files (*.eco) and navigate the .eco file which is generated from the PADS Layout > Click open.

This imports the changes of PADS Layout into PADS Logic.

Note for back annotation of renumbered Reference Designators:
    The PADS Layout Link in PADS Logic or creating an ECO file by using Tools > Compare/ECO in PADS Layout will not result in a correct reference designator update; this is particularly true for discrete devices.
    To pass ref des renumbering back to Logic you must specify that an ECO file be created in ECO Options prior to using the Auto-Renumber function in PADS Layout. When you open the ECO toolbar in PADS Layout take note that the "Write ECO file" box is checked, the "Append to file" is unchecked, the "Write ECO file after closing ECO toolbar" is checked and what location the ECO file is being written to. Once the renumbering is complete and you exit from the ECO toolbar the ECO file that was created will then be used in PADS Logic by going to File > Import (change Files of Type to *.eco).
    Logging the ECO file in this manner creates an exact list of the reference designators, recording the current reference designator and the new reference designator that corresponds to it after renumbering.  Note: Make sure that the designs are synchronized prior to performing the auto renumbering procedure.

Solution

This will update all parts on the board with information contained in the library.

1. Open the PADS Layout file you wish to update.
2. Go to File>Export (you will be exporting an ASCII file).
3. Select a file name and location to save your ASCII file to, click Save.
4. The ASCII Output dialog box will appear.
5. Click on the ‘Select All’ button.
6. Remove the check mark from Decals and Packages, click OK.
7. Go to File>New (Save the file if you have made changes, otherwise select No).
8. If prompted with a ‘Set Start-up File’ dialog box select the System Default Start-up File.
9. Go to File>Import.
10. Browse to the location of the ASCII file created in step three, click Open.
11. The file will read in and update all parts on the board with the information contained in the library.

Make sure that your library contains all the necessary part types and PCB decals for the board.

Note 1: This process will update the PCB decals, but will not update Part type information such as attributes or alphanumeric pins.
Note 2: When a decal’s pad stacks are modified and only the Selected component is updated then the decal name is appended with an "a".  If the design database contains modified decals like this the update process may fail for those decals unless they exist in the library.

Created By: Hussein Nosair

Source: Polygons Pours & Copper Regions

* A copper pour on a signal layer is a common part of a PCB design.

* Hatched pour is used for ground plains in an analog design.

* Solid pour is used for carrying heavy currents.

* Solid pour is also used for ground plains meant for EMC shielding.

Electrical Design Factors

Conductor Capacitance

C = 0.31 a/b + 0.23(1 + k) log10 (1 + 2b/d +2b + b²/d²)

Where
k = Substrate dielectric constant
a = Conductor thickness
b = Width of conductor in inches
d = Distance between conductors in inches

Conductor Resistance

R = 0.000227W

Where
W = Width of conductor

Characteristic Impedance

Zo = R + jwL / G + kwC

Where
Zo = Apparent Z of an infinitely long line in ohms
R = Resistance in ohms
L = Inductance in Henries
G = Conductor per unit length of line in mhos
C = Capacitance in farads

Characteristic Impedance for a Micro Strip

Zo = (h/W) (377 / (Sqrt. e_r) {1 + (2h/PI W)[1 + ln(PI W/h)]}

Where
h = Dielectric thickness
W = Micro Strip width
e_r = Effective dielectric constant of substrate